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Design of FPGA’s High Speed Configurable Logic Units

Publication Date : 04/05/2016



Author(s) :

Gayatri Duberkar , Prof. Y. S. Hon.


Conference Name :
International Conference on Recent Trends in Engineering and Technology



Abstract :

This paper presents the research and design of FPGA’s high speed configurable logic unit under 22nm technology. The keystone is the design of FPGA’s two basic elements – look-up table (LUT) and configurable register.CMOS TG and designed control circuit is used to implement the complex function of FPGA’s configurable register to reduce the critical path’s delay. Experimental result shows the achieved speed is comparable and even faster than Xilinx’s Virtex4 & 65nm tech while retaining small leakage power and area.


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