Call For Paper Volume:4 Issue:10 Oct'2017 |

Design of Asynchronous Viterbi Decoder using Dual-Rail Protocol for Low Power Consumption

Publication Date : 21/04/2015



Author(s) :

Sonali V. Mothe , Prof. Surekha Tadse Kalambe .


Volume/Issue :
Volume 2
,
Issue 4
(04 - 2015)



Abstract :

The main objective of this paper is to design Asynchronous Viterbi Decoder system. To design asynchronous Viterbi decoder, there is need to design a convolution encoder, this work defines the design of Convolution Encoder for constraint length K= 3 and code rate r= 1/3 and input bit k=1. As the literature review shows that the input bit sequence is four times of the constraint length of the encoder. The constraint length of encoder is K=3, then the input is provide to encoder is 12 bit long i.e. four times of constraint length. To make the system asynchronous, there is a need of local handshaking protocol. Here dual-rail protocol is used to make the system asynchronous from synchronous. As Viterbi decoder is widely used in portable devices, so the important thing is to reduce the consumption of power from the device for better reliability. Therefore the focus of this research is to lower the power consumption, for that the system needs to make asynchronous, by applying the handshake protocol as Dual-Rail Protocol. So the main aim of this paper is to design of asynchronous viterbi decoder using dual rail protocol for low power consumption.


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Design of Asynchronous Viterbi Decoder using Dual-Rail Protocol for Low Power Consumption

April 19, 2015