Author(s) :

Amit Ranjan Sinha , Dr. G. R. Sinha.

Volume/Issue :

Abstract :

Field Programmable Gate Arrays are used for implementation of Image Processing Algorithm because of its parallelism and pipelining techniques.  These techniques reduce complexity, prototyping cost and time to market cost. This also simplifies debugging and verification, hence FPGA’s are an ideal choice for implementation of image processing algorithm. The Image processing algorithm consists median filtering and morphological processing. In this paper a review on median filtering and morphological processing is presented.

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