Call For Paper Volume:4 Issue:8 Aug'2017 |

FPGA IMPLEMENTATION OF RECOVERY BOOSTING TECHNIQUE TO ENHANCE NBTI RECOVERY IN SRAM ARRAY

Publication Date : 30/11/2014



Author(s) :

S.Anitha , V.M. Senthilkumar.


Volume/Issue :
Volume 1
,
Issue 5
(11 - 2014)



Abstract :

Negative Bias Temperature Instability is an important lifetime reliability problem in microprocessors. SRAM-based structures within the processor are especially susceptible to NBTI since one of the PMOS devices in the memory cell always has an input of ‘0’. Previously proposed recovery techniques for SRAM cells aim to balance the degradation of the two PMOS devices by attempting to keep their inputs at a logic ‘0’ exactly 50% of the time. However, one of the devices is always in the negative bias condition at any given time. In this paper, we propose a technique called Recovery Boosting that allows both PMOS devices in the memory cell to be put into the recovery mode by slightly modifying the design of conventional SRAM cells to verify its functionality and quantity area and power consumption.


No. of Downloads :

12


Indexing

Web Design MymensinghPremium WordPress ThemesWeb Development

FPGA IMPLEMENTATION OF RECOVERY BOOSTING TECHNIQUE TO ENHANCE NBTI RECOVERY IN SRAM ARRAY

December 6, 2014